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Mengjie Mao
Mengjie Mao
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Year
RENO: A high-efficient reconfigurable neuromorphic computing accelerator design
X Liu, M Mao, B Liu, H Li, Y Chen, B Li, Y Wang, H Jiang, M Barnell, Q Wu, ...
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
1872015
Exploration of GPGPU register file architecture using domain-wall-shift-write based racetrack memory
M Mao, W Wen, Y Zhang, Y Chen, H Li
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
892014
Harmonica: A framework of heterogeneous computing systems with memristor-based neuromorphic computing accelerators
X Liu, M Mao, B Liu, B Li, Y Wang, H Jiang, M Barnell, Q Wu, J Yang, H Li, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 63 (5), 617-628, 2016
742016
Unleashing the potential of MLC STT-RAM caches
X Bi, M Mao, D Wang, H Li
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 429-436, 2013
572013
CD-ECC: Content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors
W Wen, M Mao, X Zhu, SH Kang, D Wang, Y Chen
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2013
562013
State-restrict MLC STT-RAM designs for high-reliable high-performance memory system
W Wen, Y Zhang, M Mao, Y Chen
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
522014
A heterogeneous computing system with memristor-based neuromorphic accelerators
X Liu, M Mao, H Li, Y Chen, H Jiang, JJ Yang, Q Wu, M Barnell
2014 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2014
362014
An efficient STT-RAM-based register file in GPU architectures
X Liu, M Mao, X Bi, H Li, Y Chen
The 20th Asia and South Pacific Design Automation Conference, 490-495, 2015
252015
Coordinating prefetching and STT-RAM based last-level cache management for multicore systems
M Mao, H Li, AK Jones, Y Chen
Proceedings of the 23rd ACM international conference on Great lakes …, 2013
252013
An energy-efficient GPGPU register file architecture using racetrack memory
M Mao, W Wen, Y Zhang, Y Chen, H Li
IEEE Transactions on Computers 66 (9), 1478-1490, 2017
222017
Prefetching techniques for STT-RAM based last-level cache in CMP systems
M Mao, G Sun, Y Li, AK Jones, Y Chen
2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 67-72, 2014
212014
Sliding basket: An adaptive ECC scheme for runtime write failure suppression of STT-RAM cache
X Wang, M Mao, E Eken, W Wen, H Li, Y Chen
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 762-767, 2016
202016
Cross-layer optimization for multilevel cell STT-RAM caches
X Bi, M Mao, D Wang, HH Li
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (6 …, 2017
172017
Temp: Thread batch enabled memory partitioning for gpu
M Mao, W Wen, X Liu, J Hu, D Wang, Y Chen, H Li
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
142016
Heterogeneous systems with reconfigurable neuromorphic computing accelerators
S Li, X Liu, M Mao, HH Li, Y Chen, B Li, Y Wang
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 125-128, 2016
132016
A holistic tri-region MLC STT-RAM design with combined performance, energy, and reliability optimizations
W Wen, M Mao, H Li, Y Chen, Y Pei, N Ge
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016
102016
VWS: A versatile warp scheduler for exploring diverse cache localities of GPGPU applications
M Mao, J Hu, Y Chen, H Li
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
102015
Exploring applications of STT-RAM in GPU architectures
X Liu, M Mao, X Bi, H Li, Y Chen
IEEE Transactions on Circuits and Systems I: Regular Papers 68 (1), 238-249, 2020
82020
TriZone: A design of MLC STT-RAM cache for combined performance, energy, and reliability optimizations
Z Liu, M Mao, T Liu, X Wang, W Wen, Y Chen, H Li, D Wang, Y Pei, N Ge
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
62017
The applications of memristor devices in next-generation cortical processor designs
H Li, B Liu, X Liu, M Mao, Y Chen, Q Wu, Q Qiu
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 17-20, 2015
62015
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