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Rachel Selina  Rajarathnam
Rachel Selina Rajarathnam
Verifierad e-postadress på utexas.edu
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ReGDS: A Reverse Engineering Framework from GDSII to Gate-level Netlist
RS Rajarathnam, Y Lin, Y Jin, DZ Pan
2020 IEEE International Symposium on Hardware Oriented Security and Trust …, 2020
312020
DREAMPlaceFPGA: An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
RS Rajarathnam, MB Alawieh, Z Jiang, M Iyer, DZ Pan
2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 300-306, 2022
152022
VLSI implementation of Piecewise Approximated antilogarithmic converter
RR Selina
2013 International Conference on Communication and Signal Processing, 763-766, 2013
112013
DREAMPlaceFPGA-PL: An Open-Source GPU-Accelerated Packer-Legalizer for Heterogeneous FPGAs
RS Rajarathnam, Z Jiang, MA Iyer, DZ Pan
Proceedings of the 2023 International Symposium on Physical Design, 175-184, 2023
32023
ICMarks: A Robust Watermarking Framework for Integrated Circuit Physical Design IP Protection
R Zhang, RS Rajarathnam, DZ Pan, F Koushanfar
arXiv preprint arXiv:2404.18407, 2024
2024
DREAMPlaceFPGA-MP: An Open-Source GPU-Accelerated Macro Placer for Modern FPGAs with Cascade Shapes and Region Constraints
Z Xiong, RS Rajarathnam, Z Jiang, H Zhu, DZ Pan
arXiv preprint arXiv:2311.08582, 2023
2023
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Artiklar 1–6