Applications of machine learning techniques in side-channel attacks: a survey B Hettwer, S Gehrer, T Güneysu Journal of Cryptographic Engineering 10, 135-162, 2020 | 105 | 2020 |
Profiled power analysis attacks using convolutional neural networks with domain knowledge B Hettwer, S Gehrer, T Güneysu International Conference on Selected Areas in Cryptography, 479-498, 2019 | 57 | 2019 |
Deep neural network attribution methods for leakage analysis and symmetric key recovery B Hettwer, S Gehrer, T Güneysu International conference on selected areas in cryptography, 645-666, 2020 | 56 | 2020 |
Lightweight Side-Channel Protection using Dynamic Clock Randomization B Hettwer, K Das, S Leger, S Gehrer, T Güneysu 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 35 | 2020 |
Encoding Power Traces as Images for Efficient Side-Channel Analysis B Hettwer, T Horn, S Gehrer, T Güneysu 2020 IEEE International Symposium on Hardware Oriented Security and Trust …, 2020 | 27 | 2020 |
Securing Cryptographic Circuits by Exploiting Implementation Diversity and Partial Reconfiguration on FPGAs B Hettwer, J Petersen, S Gehrer, H Neumann, T Güneysu 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 260-263, 2019 | 22 | 2019 |
Method for safeguarding a system-on-a-chip S Gehrer, S Leger US Patent 9,887,844, 2018 | 22 | 2018 |
Side-channel analysis of the xilinx zynq ultrascale+ encryption engine B Hettwer, S Leger, D Fennes, S Gehrer, T Güneysu IACR Transactions on Cryptographic Hardware and Embedded Systems, 279-304, 2021 | 20 | 2021 |
Reconfigurable pufs for fpga-based socs S Gehrer, G Sigl 2014 International Symposium on Integrated Circuits (ISIC), 140-143, 2014 | 16 | 2014 |
Using the reconfigurability of modern FPGAs for highly efficient PUF-based key generation S Gehrer, G Sigl 2015 10th International Symposium on Reconfigurable Communication-centric …, 2015 | 15 | 2015 |
Deep Learning Multi-Channel Fusion Attack Against Side-Channel Protected Hardware B Hettwer, D Fennes, S Leger, J Richter-Brockmann, S Gehrer, ... 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 12 | 2020 |
Method for generating a cryptographic key in a system-on-a-chip S Gehrer US Patent 10,547,459, 2020 | 12 | 2020 |
Highly Efficient Implementation of Physical Unclonable Functions on FPGAs S Gehrer Technische Universität München, 2017 | 12 | 2017 |
Aging effects on ring-oscillator-based physical unclonable functions on FPGAs S Gehrer, S Leger, G Sigl 2015 International Conference on ReConFigurable Computing and FPGAs …, 2015 | 11 | 2015 |
System and method for network intrusion detection based on physical measurements JG Merchan, S Gehrer, S Jain, SR VANCHEESWARAN, T Lothspeich US Patent 11,683,341, 2023 | 4 | 2023 |
Area-efficient PUF-based key generation on system-on-chips with FPGAs S Gehrer, G Sigl Journal of Circuits, Systems and Computers 25 (01), 1640002, 2016 | 4 | 2016 |
System and method for intrusion detection on a physical level using an internal analog to digital converter S Gehrer, JG Merchan, S Jain US Patent App. 17/032,624, 2022 | 2 | 2022 |
System and method for processing a data subject rights request using biometric data matching C Zimmermann, S Trieflinger, FB Durak, S Gehrer US Patent App. 17/518,142, 2023 | 1 | 2023 |
Microcontroller program instruction execution fingerprinting and intrusion detection M Uddin, S Gehrer, JG Merchan US Patent 11,354,411, 2022 | 1 | 2022 |
System-on-chip and security circuit including a system-on-chip of this type B Hettwer, S Gehrer US Patent 10,999,058, 2021 | 1 | 2021 |