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Mary Y. Lanzerotti
Mary Y. Lanzerotti
Collegiate Assistant Professor
Verifierad e-postadress på vt.edu - Startsida
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The Physical Design of the POWER6 Microprocessor
J Friedrich, B McCredie, N James, B Huott, B Curran, E Fluhr, G Mittal, ...
International Solid-State Circuits Conference, 96-97, 2007
167*2007
Digital instant camera having a printer
SM Gowda, MY Lanzerotti, DJ Pearson, HSP Wong
US Patent 6,628,333, 2003
1402003
Observation of Interfacial Atomic Steps During Silicon Oxidation
JM Gibson, MY Lanzerotti
Nature 340, 128-131, 1989
891989
Plan-view Transmission Electron Diffraction Measurement of Roughness at Buried Si/SiO2 Interfaces
JM Gibson, MY Lanzerotti, V Elser
Applied Physics Letters 55 (14), 1394-1397, 1989
661989
Microminiature packaging and integrated circuitry: The work of EF Rent, with an application to on-chip interconnection requirements
MY Lanzerotti, G Fiorenza, RA Rand
IBM journal of research and development 49 (4.5), 777-803, 2005
572005
Communication tagging
RW Wisniewski, MYL Wisniewski
US Patent 8,566,438, 2013
452013
High-Reflectivity, Wide-Bandwidth Optical Phase Conjugation via Four-Wave Mixing in Potassium Vapor
ALG M. Y. Lanzerotti, R. W. Schirmer
Applied Physics Letters 69 (9), 1199-1201, 1996
281996
Interpretation of Rent's Rule for Ultralarge-Scale Integrated Circuit Designs, With an Application to Wirelength Distribution Models
MY Lanzerotti, G Fiorenza, RA Rand
IEEE Transactions on Very Large Scale Integration Systems 12 (12), 1330-1347, 2004
272004
Design structure and system for identification of defects on circuits or other arrayed products
M Lanzerotti, E Yashchin, C Landers, A Takken, B Trapp
US Patent 7,752,581, 2010
182010
Modeling and forecasting of defect-limited yield in semiconductor manufacturing
M Baron, A Takken, E Yashchin, M Lanzerotti
IEEE transactions on semiconductor manufacturing 21 (4), 614-624, 2008
152008
System for identification of defects on circuits or other arrayed products
M Lanzerotti, E Yashchin, C Landers, A Takken, B Trapp
US Patent App. 11/493,092, 2006
152006
Method of extracting properties of back end of line (beol) chip architecture
RG Filippi Jr, G Fiorenza, XH Liu, CE Murray, GA Northrop, TM Shaw, ...
US Patent 7,260,810, 2007
122007
Design Structure and System for Identification of Defects on Circuits or Other Arrayed Products
M Lanzerotti, E Yashchin, C Landers, A Takken, B Trapp
US Patent App. 11/969,294, 2008
112008
Optical phase conjugation of nonclassical fields
MY Lanzerotti, AL Gaeta, RW Boyd
Physical Review A 51 (4), 3182, 1995
111995
A theoretical phase calculation approach for N simultaneous signals
MY Lanzerotti, CL Cerny, RK Martin
IEEE Transactions on Aerospace and Electronic Systems 51 (2), 878-883, 2015
102015
Assessment of On-Chip Wire-Length Distribution Models
MY Lanzerotti, G Fiorenza, RA Rand
IEEE Transactions on Very Large Scale Integration Systems 12 (10), 1108-1112, 2004
102004
Phase conjugation of weak continuous-wave optical signals
MY Lanzerotti, RW Schirmer, AL Gaeta, GS Agarwal
Physical review letters 77 (11), 2202, 1996
101996
Theory of quantum-optical measurements with a phase-conjugate mirror
MY Lanzerotti, AL Gaeta
Physical Review A 51 (5), 4057, 1995
101995
The physical design of on-chip interconnections
ICN M. Y. Lanzerotti Wisniewski, E. Yashchin, R. L. Franch, D. P. Conrady, G ...
IEEE Transactions on Computer-Aided Design 22 (3), 254-276, 2003
9*2003
The effect of branched carbon nanotubes as reinforcing nano-filler in polymer nanocomposites
SM Thompson, M Talò, B Krause, A Janke, M Lanzerotti, J Capps, ...
Composite Structures 295, 115794, 2022
82022
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Artiklar 1–20