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Howard Chen
Howard Chen
Ph.D. Graduate, University of Minnesota
Verified email at nvidia.com
Title
Cited by
Cited by
Year
Design and implementation of a lightweight dynamic optimization system
J Lu, H Chen, PC Yew, WC Hsu
Journal of Instruction-Level Parallelism 6 (4), 332-341, 2004
1882004
The performance of runtime data cache prefetching in a dynamic optimization system
J Lu, H Chen, R Fu, WC Hsu, B Othmer, PC Yew, DY Chen
Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003
1522003
Techniques for obtaining high performance in Java programs
IH Kazi, HH Chen, B Stanley, DJ Lilja
ACM Computing Surveys (CSUR) 32 (3), 213-240, 2000
1292000
Dynamic trace selection using performance monitoring hardware sampling
H Chen, WC Hsu, J Lu, PC Yew, DY Chen
Proceedings of the international symposium on Code generation and …, 2003
612003
Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads
DJ Sager, R Sasanka, R Gabor, S Raikin, J Nuzman, L Peled, JA Domer, ...
US Patent 9,672,019, 2017
602017
On the predictability of program behavior using different input data sets
WC Hsu, H Chen, PC Yew, DY Chen
Proceedings Sixth Annual Workshop on Interaction between Compilers and …, 2002
562002
Continuous adaptive object-code re-optimization framework
H Chen, J Lu, WC Hsu, PC Yew
Advances in Computer Systems Architecture: 9th Asia-Pacific Conference …, 2004
362004
Performance of runtime optimization on blast
A Das, J Lu, H Chen, J Kim, PC Yew, WC Hsu, DY Chen
International Symposium on Code Generation and Optimization, 86-96, 2005
182005
Dynamic profile driven code version selection
P Chuang, H Chen, G Hoflehner, D Lavery, W Hsu
Proceedings of the 11th Annual Workshop on the Interaction between Compilers …, 2007
172007
Thermal management for high performance integrated circuits with non-uniform chip power considerations
TD Yuan, BZ Hong, HH Chen, LK Wang
Seventeenth Annual IEEE Semiconductor Thermal Measurement and Management …, 2001
142001
Method and apparatus for implementing and maintaining a stack of predicate values with stack synchronization instructions in an out of order hardware software co-designed processor
JD Collins, J Iyer, S Winkel, P Xekalakis, HH Chen, R Brauch
US Patent App. 14/576,915, 2016
112016
A hierarchical power supply distribution model for full-chip switching noise analysis
HH Chen
Electrical Performance of Electronic Packaging, 60-63, 1997
101997
Statistical modeling and analysis of static leakage and dynamic switching power
H Chen, S Neely, J Xiong, V Zolotov, C Visweswariah
Integrated Circuit and System Design. Power and Timing Modeling …, 2009
72009
Distributed on-chip power supply noise characterization of the cell broadband engine
Y Zhou, PM Harvey, B Flachs, J Liberty, G Gervais, R Mandrekar, ...
2007 IEEE Electrical Performance of Electronic Packaging, 99-102, 2007
72007
The conversion of bulk CMOS circuits to SOI technology and its noise impact
LK Wang, HH Chen
1999 International Symposium on VLSI Technology, Systems, and Applications …, 1999
71999
Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads
DJ Sager, R Sasanka, R Gabor, S Raikin, J Nuzman, L Peled, JA Domer, ...
US Patent 10,725,755, 2020
52020
Training language models to follow instructions with human feedback
A Wang, H Chen
32022
Instruction and logic for predication and implicit destination
J Iyer, JD Collins, S Winkel, HH Chen
US Patent 9,904,546, 2018
22018
Power management and its impact on power supply noise
H Chen, I Nair
Integrated Circuit and System Design. Power and Timing Modeling …, 2010
22010
Runtime resonance noise reduction with current prediction enabled frequency actuator
Y Shi, J Xiong, H Chen, L He
IEEE transactions on very large scale integration (VLSI) systems 19 (3), 508-512, 2009
22009
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