| Programmable ion-sensitive transistor interfaces. II. Biomolecular sensing and manipulation K Jayant, K Auluck, M Funke, S Anwar, JB Phelps, PH Gordon, ... Physical Review E 88 (1), 012802, 2013 | 38 | 2013 |
| Programmable ion-sensitive transistor interfaces. I. Electrochemical gating K Jayant, K Auluck, M Funke, S Anwar, JB Phelps, PH Gordon, ... Physical Review E 88 (1), 012801, 2013 | 31 | 2013 |
| Programmable ion-sensitive transistor interfaces. III. Design considerations, signal generation, and sensitivity enhancement K Jayant, K Auluck, S Rodriguez, Y Cao, EC Kan Physical Review E 89 (5), 052817, 2014 | 18 | 2014 |
| Performance and reliability study of single-layer and dual-layer platinum nanocrystal flash memory devices under NAND operation PK Singh, G Bisht, K Auluck, M Sivatheja, R Hofmann, KK Singh, ... IEEE transactions on electron devices 57 (8), 1829-1837, 2010 | 18 | 2010 |
| A ferroelectric and charge hybrid nonvolatile memory—Part II: Experimental validation and analysis SR Rajwade, K Auluck, JB Phelps, KG Lyon, JT Shaw, EC Kan IEEE transactions on electron devices 59 (2), 450-458, 2011 | 11 | 2011 |
| A ferroelectric and charge hybrid nonvolatile memory—Part I: Device concept and modeling SR Rajwade, K Auluck, JB Phelps, KG Lyon, JT Shaw, EC Kan IEEE transactions on electron devices 59 (2), 441-449, 2011 | 11 | 2011 |
| Ferroelectric-assisted dual-switching speed DRAM–flash hybrid memory SR Rajwade, TA Naoi, K Auluck, K Jayant, RB Van Dover, EC Kan IEEE transactions on electron devices 60 (6), 1944-1950, 2013 | 8 | 2013 |
| Circuit models for ferroelectrics—Part I: Physics of polarization switching K Auluck, EC Kan IEEE Transactions on Electron Devices 63 (2), 631-636, 2015 | 7 | 2015 |
| Circuit models for ferroelectrics—Part II: Analysis of FE-nonvolatile latches K Auluck, EC Kan IEEE Transactions on Electron Devices 63 (2), 637-642, 2015 | 4 | 2015 |
| Switching dynamics in ferroelectric-charge hybrid nonvolatile memory K Auluck, S Rajwade, EC Kan 70th Device Research Conference, 133-134, 2012 | 4 | 2012 |
| Critical Assessment on Modeling and Design of Nonfaradaic CMOS Electrochemical Sensing PH Gordon, K Jayant, Y Cao, K Auluck, J Phelps, EC Kan IEEE Sensors Journal 16 (10), 3367-3373, 2015 | 2 | 2015 |
| Dynamic modeling of dual speed ferroelectric and charge hybrid memory SR Rajwade, K Auluck, TA Naoi, K Jayant, EC Kan IEEE transactions on electron devices 60 (10), 3378-3384, 2013 | 2 | 2013 |
| A unified circuit model for ferroelectrics K Auluck, EC Kan, SR Rajwade 2014 International Conference on Simulation of Semiconductor Processes and …, 2014 | 1 | 2014 |
| A hybrid ferroelectric and charge nonvolatile memory SR Rajwade, K Auluck, J Shaw, K Lyon, EC Kan 69th Device Research Conference, 169-170, 2011 | 1 | 2011 |
| Applicability of dual layer metal nanocrystal flash memory for NAND 2 or 3-bit/cell operation: Understanding the anomalous breakdown and optimization of P/E conditions P Singh, C Sandhya, K Auluck, G Bisht, M Sivatheja, G Mukhopadhyay, ... 2010 IEEE International Reliability Physics Symposium, 981-987, 2010 | 1 | 2010 |
| Analysis And Design Of Hybrid Ferroelectric-Cmos Circuits K Auluck | | 2015 |
| Circuit models for non-faradaic CMOS electrochemical sensing PH Gordon, K Jayant, Y Cao, K Auluck, J Phelps, EC Kan SENSORS, 2014 IEEE, 1107-1110, 2014 | | 2014 |
| The DNA transistor interface: The interplay between pH, electric field and membrane screening dictates sensitivity K Jayant, K Auluck, EC Kan SENSORS, 2013 IEEE, 1-4, 2013 | | 2013 |
| Design considerations for FE-charge DRAM-Flash hybrid memory K Auluck, SR Rajwade, EC Kan 71st Device Research Conference, 177-178, 2013 | | 2013 |
| Electrochemical gating on CMOS: Interplay of field, acidity and salinity on an electrolyte-insulator interface K Jayant, K Auluck, S Anwar, EC Kan 2013 Transducers & Eurosensors XXVII: The 17th International Conference on …, 2013 | | 2013 |
