| Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations A Izraelevitz, J Koenig, P Li, R Lin, A Wang, A Magyar, D Kim, C Schmidt, ... 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 209-216, 2017 | 216 | 2017 |
| A wideband all-digital CMOS RF transmitter on HDI interposers with high power and efficiency NC Kuo, B Yang, A Wang, L Kong, C Wu, VP Srini, E Alon, B Nikolić, ... IEEE Transactions on Microwave Theory and Techniques 65 (11), 4724-4743, 2017 | 19 | 2017 |
| ACED: A hardware library for generating DSP systems A Wang, P Rigge, A Izraelevitz, C Markley, J Bachrach, B Nikolić Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 16 | 2018 |
| A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance S Bailey, P Rigge, J Han, R Lin, EY Chang, H Mao, Z Wang, C Markley, ... IEEE Journal of Solid-State Circuits 54 (10), 2786-2801, 2019 | 15 | 2019 |
| A 65-nm CMOS wideband TDD front-end with integrated T/R switching via PA re-use X Xiao, A Pratt, B Yang, A Wang, AM Niknejad, E Alon, B Nikolić IEEE Journal of Solid-State Circuits 52 (7), 1768-1782, 2017 | 13 | 2017 |
| A real-time, 1.89-GHz bandwidth, 175-kHz resolution sparse spectral analysis RISC-V SoC in 16-nm FinFET A Wang, W Bae, J Han, S Bailey, O Ocal, P Rigge, Z Wang, ... IEEE Journal of Solid-State Circuits 54 (7), 1993-2008, 2019 | 11 | 2019 |
| A generator of memory-based, runtime-reconfigurable 2N3M5K FFT engines A Wang, J Bachrach, B Nikolié 2016 IEEE International Conference on Acoustics, Speech and Signal …, 2016 | 11 | 2016 |
| A 0.4-to-4-GHz all-digital RF transmitter package with a band-selecting interposer combining three wideband CMOS transmitters NC Kuo, B Yang, A Wang, L Kong, C Wu, VP Srini, E Alon, B Nikolić, ... IEEE Transactions on Microwave Theory and Techniques 66 (11), 4967-4984, 2018 | 10 | 2018 |
| A generated 7GS/s 8b time-interleaved SAR ADC with 38.2 dB SNDR at Nyquist in 16nm CMOS FinFET J Han, E Chang, S Bailey, Z Wang, W Bae, A Wang, N Narevsky, ... 2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019 | 8 | 2019 |
| A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET S Bailey, J Han, P Rigge, R Lin, E Chang, H Mao, Z Wang, C Markley, ... 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC), 285-288, 2018 | 7 | 2018 |
| A frequency-reconfigurable multi-standard 65nm CMOS digital transmitter with LTCC interposers NC Kuo, B Yang, C Wu, L Kong, A Wang, M Reiha, E Alon, AM Niknejad, ... 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 345-348, 2014 | 7 | 2014 |
| A real-time, analog/digital co-designed 1.89-GHz bandwidth, 175-kHz resolution sparse spectral analysis RISC-V SoC in 16-nm FinFET A Wang, W Bae, J Han, S Bailey, P Rigge, O Ocal, Z Wang, ... ESSCIRC 2018-IEEE 44th European Solid State Circuits Conference (ESSCIRC …, 2018 | 6 | 2018 |
| A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET A Wang, B Richards, P Dabbelt, H Mao, S Bailey, J Han, E Chang, J Dunn, ... 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 305-308, 2017 | 4 | 2017 |
| Agile Design of Generator-Based Signal Processing Hardware A Wang UC Berkeley, 2018 | 1 | 2018 |
| Supply-Adaptive Performance Monitoring/Control Employing ILRO Frequency Tuning for Highly Efficient Multicore Processors J Han, A Wang | | |
